640 x 320 CTIA Array ROIC

  • 15 µm CTIA pixel pitch
  • 60 fps with external CDS timing support
  • On-chip, low-drift temperature sensor
  • 4-channel, 12-bit, 21 MSPS pipeline ADCs
  • 16:1, 336 Mbit/sec with pseudo-LVDS CML output buffer, 1.8 V supply
  • Windowing and binning readout modes
  • 11.6 mm x 14.9 mm
  • 3.3 V and 1.8 V supplies
  • 0.35 mm, CMOS process