Custom High-Speed I/O IP Library

  • Full complement of padframe I/O for custom high-speed data transport circuitry
  • 10 Gbit/sec I/O
  • Digital I/O
  • Power, ground, analog
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Custom Receiver IP for Image Sensor Output Data

  • 8 channel with line valid detection circuitry
  • Custom DLL design for 1.2 Gbit/sec to 600 MBit/sec input data format support
  • Integrated digital block for output data formatting to image data compression IP block
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SiGe TIA-LA

  • 12 channel
  • 3.6 Gbit/sec/channel
  • Programmable output swing, bandwidth via serial interface
  • CML outputs
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SiGe VCSEL Driver

  • 12 channel
  • 3.6 Gbit/sec/channel
  • Programmable DACs via I2C interface
  • CML Inputs
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20 Gbps VCSEL Driver & Optical Receiver

  • 4 independent TX and RX paths
  • 5 Gbit/sec/channel
  • Programmable pre-emphasis and edge control
  • CML mux/demux I/O
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