Megapixel CMOS APS with Analog and Digital Readout

This paper reports the operation and performance of two 1024 x 1024-element CMOS active pixel image sensors (APS) with on-chip analog-to-digital conversion (ADC), analog and digital readout signal chain electronics. Previously, a 256 x 256-element CMOS APS with on chip timing and control was demonstrated by JPL with excellent image quality. Read more

Simulation of High Density CCD Imager Structures

Simulation results are presented for design of high-density imager in the form of 3-phase BCCD with three layers of polysilicon gates. To assure a high charge transfer efficiency we have considered a process with a dual gate dielectric having 350Å Si02 layer covered with 650Å Si3N4 layer. Read more