Tools

Fully Integrated Development: Forza Silicon operates a seamless environment of mixed-signal semiconductor EDA tools from respected and established industry vendors. Cadence Design Systems forms the core front-to-back flow, with first class PDK support from Schematic Capture to Layout, and RTL design to Place and Route. Mentor Graphics enhances front end simulation and back end verification by providing support for multiple industry standards at greatly improved speeds. All tools, seamlessly tied together in the front-to-back flow, help Forza deliver the best of products with the lowest overhead.

Front End

  • Schematic Capture: Virtuoso Schematic Composer
  • AMS Simulation: Spectre/RF; APS; Ultrasim; Analog Fast Spice; Monte Carlo; Analog Design Environment; Analog Characterization Environment
  • Digital Design: Incisive Enterprise Simulator Suite (Verilog; System Verilog)

Back End

  • Layout: Virtuoso Layout Editor
  • Synthesis: Genus
  • Place and Route: Innovus
  • Verification: Assura (LVS, DRC/QRC, PERC), PVS (PERC), Calibre (LVS, DRC)

Process/Specialty

  • Pixel Process Simulation: Synopsys Sentaurus TCAD
  • IR Drop Analysis: Silicon Frontline P2P Resistance Analysis
  • Clock Crossing Verification: Spyglass CDC
  • Version Control: ICManage (fully integrated into design database tool flow)
  • Quality Control & Certifications: ISO 9001 Certification, ITAR DDTC Registered