High-Speed CMOS Dual ADC

  • Pipelined architecture
  • Dual 10-bit, 100 MSPS ADC
  • 220 mW power consumption
  • 1.2 V supply
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RF Phase Shifter and Amplifier

  • 10.2-GHz center frequency
  • 500-MHz carrier
  • RF chain-optimized for very-low-phase noise
  • Bandpass filter
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20 Gbps VCSEL Driver & Optical Receiver

  • 4 independent TX and RX paths
  • 5 Gbit/sec/channel
  • Programmable pre-emphasis and edge control
  • CML mux/demux I/O
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Stitched CMOS Image Sensor for Radiography

  • 30 µm square pixels
  • 6 repeating segments
  • 854 H x 1200 V
  • 2-MHz pixel clock rate
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33-Megapixel CMOS Image Sensor for Studio Camera

  • 3.8 µm square pixels
  • 60 frames per second
  • On-chip column-parallel ADCs
  • Programmable pre-ADC gain
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